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127 lines
5.5 KiB
127 lines
5.5 KiB
4 years ago
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/*
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* dma.h
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*
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* Copyright (c) 2014 Jeremy Garff <jer @ jers.net>
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted
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* provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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* 3. Neither the name of the owner nor the names of its contributors may be used to endorse
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* or promote products derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef __DMA_H__
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#define __DMA_H__
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/*
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* DMA Control Block in Main Memory
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*
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* Note: Must start at a 256 byte aligned address.
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* Use corresponding register field definitions.
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*/
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typedef struct
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{
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uint32_t ti;
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uint32_t source_ad;
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uint32_t dest_ad;
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uint32_t txfr_len;
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uint32_t stride;
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uint32_t nextconbk;
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uint32_t resvd_0x18[2];
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} __attribute__((packed, aligned(4))) dma_cb_t;
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/*
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* DMA register set
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*/
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typedef struct
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{
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uint32_t cs;
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#define RPI_DMA_CS_RESET (1 << 31)
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#define RPI_DMA_CS_ABORT (1 << 30)
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#define RPI_DMA_CS_DISDEBUG (1 << 29)
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#define RPI_DMA_CS_WAIT_OUTSTANDING_WRITES (1 << 28)
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#define RPI_DMA_CS_PANIC_PRIORITY(val) ((val & 0xf) << 20)
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#define RPI_DMA_CS_PRIORITY(val) ((val & 0xf) << 16)
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#define RPI_DMA_CS_ERROR (1 << 8)
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#define RPI_DMA_CS_WAITING_OUTSTANDING_WRITES (1 << 6)
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#define RPI_DMA_CS_DREQ_STOPS_DMA (1 << 5)
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#define RPI_DMA_CS_PAUSED (1 << 4)
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#define RPI_DMA_CS_DREQ (1 << 3)
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#define RPI_DMA_CS_INT (1 << 2)
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#define RPI_DMA_CS_END (1 << 1)
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#define RPI_DMA_CS_ACTIVE (1 << 0)
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uint32_t conblk_ad;
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uint32_t ti;
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#define RPI_DMA_TI_NO_WIDE_BURSTS (1 << 26)
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#define RPI_DMA_TI_WAITS(val) ((val & 0x1f) << 21)
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#define RPI_DMA_TI_PERMAP(val) ((val & 0x1f) << 16)
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#define RPI_DMA_TI_BURST_LENGTH(val) ((val & 0xf) << 12)
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#define RPI_DMA_TI_SRC_IGNORE (1 << 11)
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#define RPI_DMA_TI_SRC_DREQ (1 << 10)
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#define RPI_DMA_TI_SRC_WIDTH (1 << 9)
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#define RPI_DMA_TI_SRC_INC (1 << 8)
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#define RPI_DMA_TI_DEST_IGNORE (1 << 7)
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#define RPI_DMA_TI_DEST_DREQ (1 << 6)
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#define RPI_DMA_TI_DEST_WIDTH (1 << 5)
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#define RPI_DMA_TI_DEST_INC (1 << 4)
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#define RPI_DMA_TI_WAIT_RESP (1 << 3)
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#define RPI_DMA_TI_TDMODE (1 << 1)
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#define RPI_DMA_TI_INTEN (1 << 0)
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uint32_t source_ad;
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uint32_t dest_ad;
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uint32_t txfr_len;
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#define RPI_DMA_TXFR_LEN_YLENGTH(val) ((val & 0xffff) << 16)
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#define RPI_DMA_TXFR_LEN_XLENGTH(val) ((val & 0xffff) << 0)
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uint32_t stride;
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#define RPI_DMA_STRIDE_D_STRIDE(val) ((val & 0xffff) << 16)
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#define RPI_DMA_STRIDE_S_STRIDE(val) ((val & 0xffff) << 0)
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uint32_t nextconbk;
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uint32_t debug;
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} __attribute__((packed, aligned(4))) dma_t;
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#define DMA0_OFFSET (0x00007000)
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#define DMA1_OFFSET (0x00007100)
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#define DMA2_OFFSET (0x00007200)
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#define DMA3_OFFSET (0x00007300)
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#define DMA4_OFFSET (0x00007400)
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#define DMA5_OFFSET (0x00007500)
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#define DMA6_OFFSET (0x00007600)
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#define DMA7_OFFSET (0x00007700)
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#define DMA8_OFFSET (0x00007800)
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#define DMA9_OFFSET (0x00007900)
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#define DMA10_OFFSET (0x00007a00)
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#define DMA11_OFFSET (0x00007b00)
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#define DMA12_OFFSET (0x00007c00)
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#define DMA13_OFFSET (0x00007d00)
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#define DMA14_OFFSET (0x00007e00)
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#define DMA15_OFFSET (0x00e05000)
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#define PAGE_SIZE (1 << 12)
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#define PAGE_MASK (~(PAGE_SIZE - 1))
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#define PAGE_OFFSET(page) (page & (PAGE_SIZE - 1))
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uint32_t dmanum_to_offset(int dmanum);
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#endif /* __DMA_H__ */
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