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Routed most of the VCA. Corrected circuit mistakes

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master
Davide Bongiovanni 4 years ago
parent 6b0597056b
commit 8b3d065726
6 changed files with 3926 additions and 3393 deletions
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204
adsr-vca.sch
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update=22/05/2015 07:44:53 update=2021-01-27 17:32:54
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[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
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[pcbnew/Layer.Edge.Cuts]
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[pcbnew/Layer.Margin]
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[pcbnew/Layer.B.CrtYd]
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[pcbnew/Layer.F.CrtYd]
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[pcbnew/Layer.B.Fab]
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[pcbnew/Layer.F.Fab]
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[pcbnew/Layer.Rescue]
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[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
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TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
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